Multiple histogram-based face recognition with high speed FPGA implementation

dc.contributor.authorHafez, A. H. Abdul
dc.contributor.authorBonny, Talal
dc.contributor.authorRabie, Tamer
dc.date.accessioned2019-11-07T09:47:25Z
dc.date.available2019-11-07T09:47:25Z
dc.date.issued2018-09
dc.departmentHKÜ, Mühendislik Fakültesi, Bilgisayar Mühendisliği Bölümüen_US
dc.description.abstractFace recognition is an algorithm that is capable of identifying or verifying a query face from multiple faces in the enrollment database. It poses a challenging problem in the field of image analysis and computer vision, especially for applications that deal with video sequences, face re-identification, or operate on intensity images and require fast processing. In this work, we introduce a high speed face recognition technique along with a high speed FPGA implementation. It uses a new similarity measure to estimate the distance between the query face and each of the database face images. The distance metric is the sum of the standard deviations between multiple histograms, which are calculated from each row of the query and database images. The lowest distance score refers to the database face that matches the query. The proposed technique is independent from the ambient illumination and outperforms the well-known face recognition algorithm "Eigenfaces" (it performs the face recognition 16 x faster when both algorithms run on the same platform). Furthermore, we exploit data parallelism in our proposed algorithm to design a hardware accelerator and to implement it on an FPGA prototyping board. The results show 10x execution time improvement in comparison to the software version.en_US
dc.identifier.citationHafez, AHA., Rabie, T., & Bonny, T. (September, 2018). Multiple histogram-based face recognition with high speed FPGA implementation. MULTIMEDIA TOOLS AND APPLICATIONS, 77, 18, 24269-24288.en_US
dc.identifier.doi10.1007/s11042-018-5647-8
dc.identifier.endpage24288en_US
dc.identifier.issn1380-7501
dc.identifier.issn1573-7721
dc.identifier.issue18en_US
dc.identifier.scopus2-s2.0-85041930769
dc.identifier.scopusqualityQ1
dc.identifier.startpage24269en_US
dc.identifier.urihttps://doi.org/10.1007/s11042-018-5647-8
dc.identifier.urihttps://hdl.handle.net/20.500.11782/613
dc.identifier.volume77en_US
dc.identifier.wosWOS:000441760900052
dc.identifier.wosqualityQ2
dc.indekslendigikaynakWeb of Science
dc.indekslendigikaynakScopus
dc.language.isoen
dc.publisherSPRINGERen_US
dc.relation.ispartofMULTIMEDIA TOOLS AND APPLICATIONS
dc.relation.publicationcategoryMakale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanıen_US
dc.rightsinfo:eu-repo/semantics/embargoedAccessen_US
dc.subjectFace recognition; Gamma correction; Performance; Hardware accelerator; FPGAen_US
dc.titleMultiple histogram-based face recognition with high speed FPGA implementation
dc.typeArticle

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